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d a t a sh eet preliminary speci?cation supersedes data of 1998 apr 16 file under integrated circuits, ic01 1998 oct 06 integrated circuits UDA1331H universal serial bus (usb) audio playback peripheral (app)
1998 oct 06 2 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H features general universal serial bus (usb) stereo audio playback peripheral (app) system with adaptive (5 to 55 khz) 20-bits digital-to-analog conversion and filtering usb-compliant audio and human interface device (hid) supports 12 mbits/s full-speed serial data transmission supports multiple audio data formats (8, 16 and 24 bits) supports headphone and line output fully automatic plug-and-play operation high linearity wide dynamic range superior signal-to-noise ratio (typical 95 db) low total harmonic distortion (typical 90 db) 3.3 v power supply efficient power management low power consumption on-chip master clock oscillator, only an external crystal is required partly programmable usb descriptors and configuration via i 2 c-bus. sound processing separate digital volume control for left and right channel soft mute digital bass and treble tone control external digital sound processor (dsp) option possible via standard i 2 s-bus or japanese digital i/o format selectable clipping prevention selectable dynamic bass boost (dbb) on-chip digital de-emphasis. document references usb specification usb common class specification usb device class definition for audio devices device class definition for human interface devices (hid) usb hid usage table . applications usb monitors usb speakers usb headsets usb telephone/answering machines usb links in consumer audio devices. general description the UDA1331H is a stereo cmos digital-to-analog bitstream converter designed for usb-compliant audio playback devices and multimedia audio applications. the UDA1331H is an adaptive asynchronous sink usb audio device with a continuous sampling frequency (f s ) range from 5 to 55 khz. it contains a usb interface, an embedded microcontroller and an asynchronous digital-to-analog converter (adac). the usb interface is the interface between the usb, the adac and the microcontroller. the usb interface consists of an analog front-end and a usb processor. the analog front-end transforms the differential usb data to a digital data stream. the usb processor buffers the input and output data from the analog front-end and handles all low-level usb protocols. the usb processor selects the relevant data from the universal serial bus, performs an extensive error detection and separates control information (input and output) and audio information (input only).
1998 oct 06 3 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H the control information becomes accessible at the microcontroller. the audio information becomes available at the digital i/o output or is fed directly to the adac. the microcontroller handles the high-level usb protocols, translates the incoming control requests and manages the user interface via general purpose (gp) pins and an i 2 c-bus. the firmware for the microcontroller must be located in an external (e)prom. the adac enables the wide and continuous range of input sampling frequencies. by means of a sample frequency generator (sfg), the adac is able to reconstruct the average sample frequency from the incoming audio samples. the adac also performs the sound processing. the adac consists of fifo registers, a unique audio feature processing dsp, the sfg, digital up-sampling filters, a variable hold register, a noise shaper (ns) and a filter stream dac (fsdac) with integrated filter and line output drivers. the audio information is applied to the adac via the usb processor or via the digital i/o input. an external dsp can be used for adding extra sound processing features via the digital i/o-bus. the UDA1331H supports the standard i 2 s-bus data input format and the lsb-justified serial data input format with word lengths of 16, 18 and 20 bits. the wide dynamic range of the bitstream conversion technique used in the UDA1331H guarantees a high audio sound quality. quick reference data notes 1. v dd is the supply voltage on pins v dda , v dde , v ddi and v ddx . v ss is the ground on pins v ssa , v sse , v ssi and v ssx . all v dd and v ss pins must be connected to the same supply or ground respectively. 2. the audio information from the usb interface is fed directly to the adac. ordering information symbol parameter conditions min. typ. max. unit supplies v dd supply voltage note 1 3.0 3.3 3.6 v i dd(tot) total supply current - 50 - ma i dd(ps) supply current in power-save mode - 18 - ma dynamic performance dac total harmonic distortion-plus-noise to signal ratio f s = 44.1 khz; r l =5k w at input signal of 1 khz (0 db) -- 90 (2) - 80 db - 0.0032 0.01 % at input signal of 1 khz ( - 60 db) -- 30 (2) - 20 db - 3.2 10 % s/n bz signal-to-noise ratio at bipolar zero a-weighted at code 0000h 90 95 - dba v o(fs)(rms) full-scale output voltage (rms value) v dd = 3.3 v - 0.66 - v general characteristics f i(sample) audio sample input frequency 5 - 55 khz t amb operating ambient temperature 0 25 70 c type number package name description version UDA1331H qfp64 plastic quad ?at package; 64 leads (lead length 1.95 mm); body 14 20 2.8 mm sot319-2 thd n + s ---------------------- -
1998 oct 06 4 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H block diagram fig.1 block diagram. handbook, full pagewidth mbk529 analog front-end d + usb-processor fifo registers osc test control block micro- controller left dac right dac timing f s f s 64f s 128f s sample frequency generator up-sample filters variable hold register UDA1331H 3rd-order noise shaper reference voltage audio feature processing dsp digital i/o gp4/bcko gp2/do gp0/bcki gp3/wso gp1/di v ssx tc rtcb shtcb xtal2 xtal1 v ddx voutl gp5/wsi scl 20 17 3 4 32 30 29 25 51 49 45 53 39 38 37 36 55 61 15 14 13 10 7 64 2 44 46 sda ea 6 8 psen ale 9 11 p2.0 p2.1 12 18 p2.2 p2.3 19 21 p2.4 p2.5 22 23 p2.6 p2.7 24 56 p0.0 p0.1 57 58 p0.2 59 p0.3 p0.4 60 62 p0.5 p0.6 63 5 p0.7 v dde v sse v ssi v ddi v ddo v sso v dda v ssa voutr v ref 42 d -
1998 oct 06 5 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H pinning symbol pin i/o description n.c. 1 - not connected gp5/wsi 2 i/o general purpose pin 5 or word select input scl 3 i/o serial clock input (i 2 c-bus) sda 4 i/o serial data input/output (i 2 c-bus) p0.7 5 i/o port 0.7 of the microcontroller ea 6 i/o external access (active low) gp1/di 7 i/o general purpose pin 1 or data input psen 8 i/o program store enable (active low) ale 9 i/o address latch enable (active high) gp2/do 10 i/o general purpose pin 2 or data output for extra dsp chip p2.0 11 i/o port 2.0 of the microcontroller p2.1 12 i/o port 2.1 of the microcontroller gp3/wso 13 i/o general purpose pin 3 or master word select output for extra dsp chip gp4/bcko 14 i/o general purpose pin 4 or master bit clock output for extra dsp chip shtcb 15 i shift clock tcb input (active high) n.c. 16 - not connected d - 17 i/o negative data line of the differential data bus conform to the usb-standard p2.2 18 i/o port 2.2 of the microcontroller p2.3 19 i/o port 2.3 of the microcontroller d+ 20 i/o positive data line of the differential data bus conform to the usb-standard p2.4 21 i/o port 2.4 of the microcontroller p2.5 22 i/o port 2.5 of the microcontroller p2.6 23 i/o port 2.6 of the microcontroller p2.7 24 i/o port 2.7 of the microcontroller v ddi 25 - digital supply voltage core n.c. 26 - not connected n.c. 27 - not connected n.c. 28 - not connected v ssi 29 - digital ground core v sse 30 - digital ground i/o pins n.c. 31 - not connected v dde 32 - digital supply voltage i/o pins n.c. 33 - not connected n.c. 34 - not connected n.c. 35 - not connected v ssx 36 - crystal oscillator ground xtal1 37 i crystal oscillator input 1 xtal2 38 o crystal oscillator output 2 v ddx 39 - crystal oscillator supply voltage n.c. 40 - not connected
1998 oct 06 6 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H n.c. 41 - not connected v ref 42 o reference output voltage n.c. 43 - not connected v ssa 44 - analog ground v dda 45 - analog supply voltage voutr 46 o right channel output voltage n.c. 47 - not connected n.c. 48 - not connected v sso 49 - operational ampli?er ground n.c. 50 - not connected v ddo 51 - operational ampli?er supply voltage n.c. 52 - not connected voutl 53 o left channel output voltage n.c. 54 - not connected tc 55 i test control input (active high) p0.0 56 i/o port 0.0 of the microcontroller p0.1 57 i/o port 0.1 of the microcontroller p0.2 58 i/o port 0.2 of the microcontroller p0.3 59 i/o port 0.3 of the microcontroller p0.4 60 i/o port 0.4 of the microcontroller rtcb 61 i asynchronous reset input for test control box (active high) p0.5 62 i/o port 0.5 of the microcontroller p0.6 63 i/o port 0.6 of the microcontroller gp0/bcki 64 i/o general purpose pin 0 or master bit clock input symbol pin i/o description
1998 oct 06 7 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H fig.2 pin configuration. handbook, full pagewidth UDA1331H mbk528 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 n.c. gp5/wsi scl sda p0.7 ea gp1/di psen ale gp2/do p2.0 p2.1 gp3/wso gp4/bcko shtcb n.c. d - p2.2 p2.3 v ddo n.c. v sso n.c. n.c. voutr v dda v ssa n.c. v ref n.c. n.c. v ddx xtal2 xtal1 v ssx n.c. n.c. n.c. 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 gp0/bcki p0.6 p0.5 rtcb p0.4 p0.3 p0.2 p0.1 p0.0 tc n.c. voutl n.c. d + p2.4 p2.5 p2.6 p2.7 v ddi n.c. n.c. n.c. v ssi v sse n.c. v dde
1998 oct 06 8 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H functional description all bold-faced parameters given in this data sheet such as balternatesetting are part of the usb specification as described in usb device class definition for audio devices . the universal serial bus (usb) data and power are transferred via the usb by a 4-wire cable. the signalling occurs via two wires and point-to-point segments. the signals on each segment are differentially driven into a cable of 90 w intrinsic impedance. the differential receiver features input sensitivity of at least 200 mv and sufficient common mode rejection. the analog front-end the analog front-end is an on-chip generic usb transceiver. it is designed to allow voltage levels up to v dd from standard or programmable logic to interface with the physical layer of the usb. it is capable of receiving and transmitting serial data at full speed (12 mbits/s). the usb processor the usb processor forms the interface between the analog front-end, the adac and the microcontroller. the usb processor consists of: the philips serial interface engine (psie) the memory management unit (mmu) the audio sample redistribution (asr) module. t he p hilips s erial i nterface e ngine and m emory m anagement u nit (psie and mmu) the psie and mmu translate the electrical usb signals into bytes and signals. depending upon the usb device address and the usb endpoint address, the usb data is directed to the correct endpoint buffer on the psie and mmu interface. the data transfer could be of the bulk, isochronous, control or interrupt type. the usb device address is con?gured during the enumeration process. the UDA1331H has three endpoints. these are: control endpoint 0 status interrupt endpoint isochronous data sink endpoint. the amount of bytes per packet on the control endpoint is limited by the psie and mmu hardware to 8 bytes per packet. the psie is the digital front-end of the usb processor. this module recovers the 12 mhz usb clock, detects the usb sync word and handles all low-level usb protocols and error checking. the mmu is the digital back-end of the usb processor. it handles the temporary data storage of all usb packets that are received or sent over the bus. three types of packets are defined on the usb. these are: token packets data packets handshake packets. the token packet contains information about the destination of the data packet. the audio data is transferred via an isochronous data sink endpoint and consequently no handshaking mechanism is used. the mmu also generates a 1 khz clock that is locked to the usb start-of-frame (sof) token. t he a udio s ample r edistribution (asr) module the asr module reads the audio samples from the mmu and distributes these samples equidistant over a 1 ms frame period. the distributed audio samples are translated by the digital i/o module to standard i 2 s-bus format or japanese digital i/o format. the asr module generates the bit clock and the word select signal of the digital i/o. the digital i/o formats the received audio samples to one of the four speci?ed serial digital audio formats (standard i 2 s-bus, 16, 18 or 20 bits lsb-justi?ed). the microcontroller the microcontroller receives the control information selected from the usb by the usb processor. it handles the high-level usb protocols and the user interfaces. the major task of the software process, that is mapped upon the microcontroller, is to control the different modules of the UDA1331H in such a way that it behaves as a usb device. therefore the microcontroller: interprets the usb requests and maps them upon the UDA1331H application controls the internal operation of the UDA1331H and the digital i/o pins communicates with the external world (eeprom) using the i 2 c-bus facility and the general purpose i/o pins. the firmware must be located in an external (e)prom. the UDA1331H will be delivered with standard usb compliant firmware.
1998 oct 06 9 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H the asynchronous digital-to-analog converter (adac) the adac receives usb audio information from the usb processor or from the digital i/o-bus. the adac is able to reconstruct the sample clock from the rate at which the audio samples arrive and handles the audio sound processing. after processing, the audio signal is up-sampled, noise-shaped and converted to analog output voltages capable of driving a line output. the adac consists of: a sample frequency generator (sfg) first-in first-out (fifo) registers an audio feature processing dsp two digital up-sample filters a variable hold register a digital noise shaper (ns) a filter stream dac (fsdac) with integrated filter and line output drivers. t he s ample f requency g enerator (sfg) the sfg controls the timing signals for the asynchronous digital-to-analog conversion. by means of a digital pll, the sfg automatically recovers the applied sampling frequency and generates the accurate timing signals for the audio feature processing dsp and the up-sample ?lters. f irst -i n f irst -o ut (fifo) registers the fifo registers are used to store the audio samples temporarily coming from the usb processor or from the digital i/o input. the use of a fifo register (in conjunction with the sfg) is necessary to remove all jitter present on the incoming audio signal. t he audio feature processing dsp a dsp processes the sound features. the control and mapping of the sound features is explained in section controlling the usb audio playback peripheral (app). depending on the sampling rate (f s ) the dsp has four frequency domains in which the treble and bass are regulated (see table 1). the domain is chosen automatically. t he up - sample filters and variable hold register after the audio feature processing dsp two up-sample filters and a variable hold register increase the oversampling rate to 128f s . table 1 frequency domains for audio processing t he noise shaper a 3rd-order noise shaper converts the oversampled data to a noise-shaped bitstream for the fsdac. the in-band quantization noise is shifted to frequencies well above the audio band. t he f ilter s tream dac (fsdac) the fsdac is a semi-digital reconstruction filter that converts the 1-bit data stream of the noise shaper to an analog output voltage. the filter coefficients are implemented as current sources and are summed at virtual ground of the output operational amplifier. in this way very high signal-to-noise performance and low clock jitter sensitivity is achieved. a post filter is not needed because of the inherent filter function of the dac. on-board amplifiers convert the fsdac output current to an output voltage signal capable of driving a line output. usb audio playback peripheral (app) descriptors in a typical usb environment the usb host has to know which kind of devices are connected. for this purpose each device contains a number of usb descriptors. these descriptors describe, from different points of view (usb configuration, usb interface and usb endpoint), the capabilities of a device. each of them can be requested by the host. the collection of descriptors is denoted as a descriptor map. this descriptor map will be reported to the usb host during enumeration and on request. the full descriptor map is implemented in the firmware exploiting the full functionality of the UDA1331H. the usb descriptors and their most important fields, in relationship to the characteristics of the UDA1331H are briefly explained below. g eneral descriptors the UDA1331H supports one configuration containing a control interface, an audio interface and a hid interface. the descriptor map that describes this configuration is partly fixed and partly programmable. domain sample frequency (khz) 1 5 to 12 212to25 325to40 440to55
1998 oct 06 10 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H fig.3 audio function topology. handbook, full pagewidth mbk530 input terminal output terminal feature unit fu it ot the programmable part can be retrieved from one of four configuration maps located in the (e)prom or from an i 2 c-bus eeprom. at start-up one of four configuration maps can be selected depending on the logical combination of gp3 and gp0. it is possible to overwrite this configuration map with a configuration map loaded from an i 2 c-bus eeprom. a udio device class specific descriptors the audio device class is partly specified with standard descriptors and partly with specific audio device class descriptors. the standard descriptors specify the number and the type of the interface or endpoint. the UDA1331H supports 7 different audio modes: 8-bit pulse code modulation (pcm) mono or stereo audio data 16-bit pcm mono or stereo audio data 24-bit pcm mono or stereo audio data zero bandwidth mode. each mode is defined as an alternate setting of the audio interface, selectable with the standard audio streaming interface descriptor balternatesetting field. the seven alternate settings are described in more detail by the specific audio device class descriptors. the UDA1331H supports the input terminal (it), output terminal (ot) and the feature unit (fu) descriptors. the input and output terminals are not controllable via the usb. the feature unit provides the basic manipulation of the incoming logical channels. the supported sound features are: volume control mute control treble control bass control bass boost control. table 2 audio bandwidth at each audio mode the maximum number of audio data samples within a usb packet arriving on the isochronous sink endpoint is restricted by the buffer capacity of this isochronous endpoint. the maximum buffer capacity is 336 bytes/ms. for each alternate setting with audio, a maximum bandwidth is claimed as indicated in the standard isochronous audio data endpoint descriptor wmaxpacketsize field. to allow a small overshoot in the number of audio samples per packet, the top sample frequency of 55 khz is taken in the calculation of the bandwidth for each alternate setting. for each alternate setting, with its own isochronous audio data endpoint descriptor, wmaxpacketsize field is then defined as described in table 2. although in a specific UDA1331H application no endpoint control properties can be used upon the isochronous adaptive sink endpoint, the descriptors are still necessary to inform the host about the definition of this endpoint: isochronous, adaptive, sink, continuous sampling frequency (at input side of this endpoint) with lower bound of 5 khz and upper bound of 55 khz. the audio class specific descriptors can be requested with the get descriptor: configuration request, which returns all the descriptors, except the device descriptor. audio mode wmaxpacketsize 8-bit pcm; mono 56 ( 8 8 1 56) 8-bit pcm; stereo 112 ( 8 8 2 56) 16-bit pcm; mono 112 ( 16 8 1 56) 16-bit pcm; stereo 224 ( 16 8 2 56) 24-bit pcm; mono 168 ( 24 8 1 56) 24-bit pcm; stereo 336 ( 24 8 2 56)
1998 oct 06 11 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H h uman interface device specific descriptors the inputs defined on the UDA1331H are transmitted via the usb to the host according to the hid class. the host responds with the appropriate settings via the audio device class for the audio related parts or via the hid class for the hid related inputs and outputs of the UDA1331H. a hid descriptor is necessary to inform the host about the conception of the user interface. the host communicates via the hid device driver using either the control pipe or the interrupt pipe. the UDA1331H uses usb endpoint 0 (control pipe) to respond to the hid specific get/set report request to receive or transmit data from or to the UDA1331H. the UDA1331H uses the status interrupt endpoint as interrupt pipe for polling asynchronous data. the UDA1331H is a high-speed device. the maximum transaction size is 64 bytes per usb frame and the polling rate is defined at a maximum of every 1 ms. the host requests the configuration descriptor which includes the standard interface descriptor, the hid endpoint descriptor and the hid descriptor. the hid device driver of the host then requests the report descriptor. report descriptors are composed of pieces of information about the device. each piece of information is called an item. all items have a 1-byte prefix that contains the item tag, type and size. in the UDA1331H only the short item basic type is used. the hosts hid device driver will parse the report descriptor and the defined items. by examining all of these items, the hid class driver is able to determine the size and composition of data reports from the device. the main items of the UDA1331H are input and output reports. input reports are sent via the interrupt pipe (UDA1331H usb address 3). input and output reports can be requested by the host via the control endpoint (usb address 0). the UDA1331H supports a maximum of three pushbuttons, which represents a certain feature of the UDA1331H. if pressed by the user the pushbutton will go to its on state, if not pressed the pushbutton will go back to its off state. the UDA1331H supports a maximum of two outputs for e.g. user leds. for more information about the input and output functions of the UDA1331H see the application documentation of the device. controlling the usb audio playback peripheral (app) this section describes the functionality of the feature unit of the UDA1331H. the mapping of this functionality onto usb descriptors is as implemented in the firmware. the sound features as defined in the usb device class definition for audio devices are mapped on the UDA1331H specific feature registers by the microcontroller. these specific sound features are: volume control (separate for left and right stereo channels, no master channel) mute control (only master channel) treble control (only master channel) bass control (only master channel) dynamic bass boost control (only master channel). these specific features can be activated via the host (audio device class requests) or via the gp pins (hid plus audio device class requests). via the i 2 c-bus the user is able to download the necessary configuration data for different applications (definition of the function of the gp pins, with or without digital i/o functionality, etc.). the mapping and control of the standard usb audio features and UDA1331H specific features is described below. v olume control volume control is possible via the host or via predefined gp pins. the setting of 0 db is always referenced to the maximum available volume setting. table 3 gives the mapping of wvolume value (as defined in the usb device class definition for audio devices ) upon the actual volume setting of the usb app. when using the UDA1331H, the range is 0 down to - 60 db (in steps of 1 db) and - db. independant control of left/right volume is possible. it should be noted that wvolume bits b7 to b0 are not used. values above 0 db are returned as 0 db. the volume value at start-up of the device is defined in the selected configuration map. balance control is possible via the separate volume control option of both channels. therefore the characteristics of the balance control are equal to the volume control characteristics.
1998 oct 06 12 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H table 3 volume control characteristics wvolume volume usb side (db) volume usb app (db) b15 b14 b13 b12 b11 b10 b9 b8 00000000 0 0 11111111 - 1 - 1 11111110 - 2 - 2 11111101 - 3 - 3 11111100 - 4 - 4 11111011 - 5 - 5 11111010 - 6 - 6 11111001 - 7 - 7 11111000 - 8 - 8 11110111 - 9 - 9 11110110 - 10 - 10 ... ... ... ... ... ... ... ... ... ... 11000101 - 59 - 59 11000100 - 60 - 60 11000011 - 61 - 11000010 - 62 - ... ... ... ... ... ... ... ... ... ... 10000000 - - m ute control mute is one of the sound features as defined in the usb device class definition for audio devices . the mute control request data bmute controls the position of the mute switch. the position can be either on or off. when bmute is true the feature unit is muted. when bmute is false the feature unit is not muted. when the mute is active for the master channel, the value of the sample is decreased smoothly to zero following a raised cosine curve. there are 32 coefficients used to step down the value of the data, each one being used 32 times before stepping to the next. this amounts to a mute transition of 23 ms at f s = 44.1 khz. when the mute is released, the samples are returned to the full level again following a raised cosine curve with the same coefficients being used in reversed order. the mute, on the master channel is synchronized to the sample clock, so that operation always takes place on complete samples. a mute can be given via the host or by pressing a predefined gp pin.
1998 oct 06 13 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H t reble control the treble control is available for the master channel of the UDA1331H. treble can be regulated in three modes: minimum, flat and maximum mode. the preferred mode is selected at start-up of the device (configuration map). the corner frequency is 3000 hz for the minimum mode and 1500 hz for the maximum mode. the treble range is from 0 to 6 db in steps of 2 db. it should be noted that the negative treble values as defined in the usb device class definition for audio devices are not supported by the UDA1331H; the 0 db value is returned as 0 db. table 4 gives the mapping of the btreble value upon the actual treble setting of the usb app. table 4 treble control characteristics btreble treble usb side (db) treble usb app (db) b7 b6 b5 b4 b3 b2 b1 b0 minimum ?at maximum 0 0 0 0 0 0 0 0 0.00 0 0 0 0 0 0 0 0 0 0 1 0.25 0 0 0 0 0 0 1 0 0.50 0 0 0 0 0 0 1 1 0.75 0 0 0 0 0 1 0 0 1.00 0 0 0 0 0 1 0 1 1.25 2 0 2 0 0 0 0 0 1 1 0 1.50 0 0 0 0 0 1 1 1 1.75 0 0 0 0 1 0 0 0 2.00 0 0 0 0 1 0 0 1 2.25 0 0 0 0 1 0 1 0 2.50 0 0 0 0 1 0 1 1 2.75 0 0 0 0 1 1 0 0 3.00 0 0 0 0 1 1 0 1 3.25 4 0 4 ... 0 0 0 1 0 1 0 1 5.25 6 0 6 ... 0 0 0 1 1 1 0 1 7.25 6 0 6 ... 0 0 1 0 0 1 0 1 9.25 6 0 6 ... 0 1 1 1 1 1 1 1 31.75 6 0 6
1998 oct 06 14 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H b ass control the bass control is available for the master channel of the UDA1331H. bass can be regulated in three modes: minimum, flat and maximum mode. the preferred mode is selected at start-up of the device (configuration map). the bass range is from 0 to about 14 db (minimum mode) or about 24 db (maximum mode) in steps of 2 db. it should be noted that the negative bass values as defined in the usb device class definition for audio devices are not supported by the UDA1331H; the 0 db value is returned as 0 db. the maximum bass value which will be reported to the host is always 24 db independent of the mode. the maximum mode is the most accurate mode when the bass values are reported to the host. the corner frequency is 100 hz for the minimum mode and 75 hz for the maximum mode. table 5 gives the mapping of the bbass value upon the actual bass setting of the usb app. table 5 bass control characteristics bbass bass usb side (db) bass usb app (db) b7 b6 b5 b4 b3 b2 b1 b0 minimum ?at maximum 0 0 0 0 0 0 0 0 0.00 0 0 0 0 0 0 0 0 0 0 1 0.25 0 0 0 0 0 0 1 0 0.50 0 0 0 0 0 0 1 1 0.75 0 0 0 0 0 1 0 0 1.00 0 0 0 0 0 1 0 1 1.25 1.1 0 1.7 0 0 0 0 0 1 1 0 1.50 0 0 0 0 0 1 1 1 1.75 0 0 0 0 1 0 0 0 2.00 0 0 0 0 1 0 0 1 2.25 0 0 0 0 1 0 1 0 2.50 0 0 0 0 1 0 1 1 2.75 0 0 0 0 1 1 0 0 3.00 0 0 0 0 1 1 0 1 3.25 2.4 0 3.6 ... 0 0 0 1 0 1 0 1 5.25 3.7 0 5.4 ... 0 0 0 1 1 1 0 1 7.25 5.2 0 7.4 ... 0 0 1 0 0 1 0 1 9.25 6.8 0 9.4 ... 0 0 1 0 1 1 0 1 11.25 8.4 0 11.3 ... 0 0 1 1 0 1 0 1 13.25 10.2 0 13.3 ... 0 0 1 1 1 1 0 1 15.25 11.9 0 15.2 ... 0 1 0 0 0 1 0 1 17.25 13.7 0 17.3 ...
1998 oct 06 15 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H 0 1 0 0 1 1 0 1 19.25 13.7 0 19.2 ... 0 0 1 1 1 0 1 1 21.25 13.7 0 21.2 ... 0 1 0 1 0 1 0 1 23.25 13.7 0 23.2 ... 0 1 1 0 0 1 0 1 25.25 13.7 0 23.2 ... 0 1 1 0 1 1 0 1 27.25 13.7 0 23.2 ... 0 1 1 1 0 1 0 1 29.25 13.7 0 23.2 ... 0 1 1 1 1 1 0 1 31.25 13.7 0 23.2 ... 0 1 1 1 1 1 1 1 31.75 13.7 0 23.2 bbass bass usb side (db) bass usb app (db) b7 b6 b5 b4 b3 b2 b1 b0 minimum ?at maximum d ynamic bass boost control bass boost is one of the sound features as defined in the usb device class definition for audio devices . the bass boost control request data bbassboost controls the position of the bass boost switch. the position can be either on or off. when bbassboost is true the bass boost is activated. when bbassboost is false the bass boost is off. when clipping prevention is active, the bass is reduced to avoid clipping with high volume settings. bass boost is selectable via the configuration map (see table 6). if byte 19h is loaded with 00h, bass boost is not reported to the usb host by the device. clipping prevention if the maximum of the bass plus volume gives clipping, the bass is reduced. clipping prevention is selectable via the configuration map. de-emphasis de-emphasis is one of the properties which is not supported by the usb. de-emphasis for 44.1 khz can be predefined in the configuration map selected at start-up of the UDA1331H.
1998 oct 06 16 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H fig.4 diode matrix selection. handbook, full pagewidth mgm109 10 nf 10 nf 22 pf 22 pf 4 6 5 3 2 1 usb-b connector v bus 22 w 22 w d - gp5 gp3 gp0 d + 1.5 k w 22 k w 22 k w 22 k w 22 k w 22 k w 22 k w tr3 tr1 tr2 3.3 v 3.3 v 3.3 v 3.3 v 22 k w v bus 1 2 d2 1 2 d1 key 1 sw1 key 2 sw2 start-up and con?guration of the UDA1331H s tart - up of the UDA1331H after power-on, an internal power-on reset signal becomes high after a certain rc-time (r = 5 k w and c = c ref ). during 10 ms after power-on reset the UDA1331H has to initiate the internal settings. after the power-on reset the UDA1331H becomes master of the i 2 c-bus. the UDA1331H tries to read the eventually connected eeprom and if an eeprom is detected, the internal descriptors are overwritten and the selected port configuration is applied. if no eeprom is detected, the UDA1331H tries to read the logical levels of gp3 and gp0. a choice can be made from four configuration maps via these two pins. c onfiguration selection of the UDA1331H via a diode matrix the UDA1331H uses a configuration map to hold a number of specific configurable data on hardware, product, component and usb configuration level. at start-up without eeprom, the UDA1331H will scan the logical levels of gp3 and gp0. with these two pins it is possible to select one of the four possible (vendor specific) configuration maps which are held in the external (e)prom. this selection can be achieved via a diode matrix (see fig.4). after selecting a configuration map the user cannot change the chosen settings for the gp pins, internal configuration, descriptors, etc. for more information about the four (vendor specific) configuration maps located in the (e)prom and the diode matrix see the application documentation. c onfiguration options of the UDA1331H via an i 2 c- bus eeprom if an eeprom is detected (reading byte 0 as aah and byte 1 as 55h), the UDA1331H will use the configuration map in the eeprom instead of one of four configuration maps. the layout of the configuration map is fixed, the values (except bytes 0 and 1) are user definable (see table 6). if the user wants to change these values (the manufacturers name for instance), this can be achieved via the eeprom code. the communication between the UDA1331H and the external i 2 c-bus device is based on the standard i 2 c-bus protocol given in the philips specification the i 2 c-bus and how to use it (including specifications) , which can be ordered using the code 9398 393 40011. the i 2 c-bus has two lines: a clock line scl and a serial data line sda (see fig.5).
1998 oct 06 17 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... handbook, full pagewidth mbc611 p s sr p t su;sto t sp t hd;sta t su;sta t su;dat t f t high t r t hd;dat t low t hd;sta t buf sda scl fig.5 definition of timing of the i 2 c-bus.
1998 oct 06 18 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H table 6 control options for the UDA1331H via the eeprom con?guration map; note 1 byte (hex) register name comments bit value 0 - recognition pattern; do not change it aah 1 - recognition pattern; do not change it 55h 2 asr control register robust word clock 7 0 = off 1=on serial i 2 s-bus output format 6 and 5 00 = i 2 s-bus 01 = 16-bit lsb 10 = 18-bit lsb 11 = 20-bit lsb phase inversion 4 0 = mono phase inversion off 1 = mono phase inversion on bits per sample modi 3 and 2 00 = reserved 01 = 8-bit audio 10 = 16-bit audio 11 = 24-bit audio audio mode 1 0 = mono 1 = stereo asr register start-up mode 0 0 = stop 1=go 3 adac mode register 0 selection adac mode register 7 0 audio feature mode 6 and 5 00 = ?at 01 = minimum 10 = minimum 11 = maximum de-emphasis 4 0 = de-emphasis off 1 = de-emphasis on channel manipulation 3 0 = l t l, r t r 1=l t r, r t l synchronous/asynchronous control 2 0 = asynchronous 1 = synchronous mute control 1 0 = no mute 1 = mute active reset adac 0 0 = no reset adac 1 = reset adac
1998 oct 06 19 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H 4 adac mode register 1 selection adac mode register 7 1 digital pll lock speed 6 and 5 00 = lock after 512 samples 01 = lock after 2048 samples 10 = lock after 4096 samples 11 = lock after 16384 samples digital pll lock mode 4 0 = adaptive 1 = ?xed digital pll mode 3 and 2 00 = adaptive 01 = ?xed state 1 10 = ?xed state 2 11 = ?xed state 3 serial i 2 s-bus input format 1 and 0 00 = i 2 s-bus 01 = 16-bit lsb 10 = 18-bit lsb 11 = 20-bit lsb 5 i/o selection register clipping 7 0 = clipping prevention off 1 = clipping prevention on i 2 s-bus usage 6 0 = no i 2 s-bus used 1=i 2 s-bus used 4/6 pins i 2 s-bus (see section the general purpose pins (gp0 to gp5)) 5 only if i 2 s-bus is used; 0 = 4 pins i 2 s-bus 1 = 6 pins i 2 s-bus gp4 4 0 = function 1 1 = function 2 (see tables 7, 8 and 9) gp3 3 gp2 2 gp1 1 gp0 0 6 gp0 usage page if hid selected 7 gp0 usage if hid selected 8 reserved 9 reserved a gp3 usage page if hid selected b gp3 usage if hid selected c reserved d reserved e gp4 usage page if hid selected f gp4 usage if hid selected 10 reserved byte (hex) register name comments bit value
1998 oct 06 20 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H 11 gp1 and gp2 outputs de?nition register reserved 7 reserved 6 application gp2 function 2 5 0 = hid output 2 1 = led output 2 (activated when dbb is active) application gp1 function 2 4 0 = hid output 1 1 = led output 1 (activated when mute is active) polarity gp2 function 1 3 normal or inversed output functionality: 0 = according table 7 1 = inversed polarity gp1 function 1 2 polarity gp2 function 2 1 polarity gp1 function 2 0 12 gp1 usage page if hid selected 13 gp1 usage if hid selected 14 gp2 usage page if hid selected 15 gp2 usage if hid selected 16 time between releasing standby and enabling the audio output; steps of 20 ms 17 time between no isochronous data present and activating the mute output; steps of 1 s; (only applicable for function 1; no digital i/o communication) 18 time between activating the mute output and activating the standby output; steps of 5 s; (only applicable for function 1; no digital i/o communication). when ?lled with zero standby will not be activated. 19 default bass boost value on top of bass usb app for dynamic bass boost (dbb); see table 5 bass boost = register value; if bass boost + bass usb app is larger then the maximum value of table 5, the maximum value is used (no bass boost in ?at mode) 1a default volume value of usb app volume = - register value 1b idvendor high byte 1c idvendor low byte 1d idproduct high byte 1e idproduct low byte 1f bmattributes 20 maximum power steps of 2 ma with maximum 500 ma byte (hex) register name comments bit value
1998 oct 06 21 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H notes 1. an extensive description of the usb control options is available in the usb device class definition for audio devices . 2. the serial number is only supported in the external configuration map and not in the four internal configuration maps. the general purpose pins (gp0 to gp5) the UDA1331H has 6 general purpose (gp) pins; these are pins gp0 to gp5. these can be used either for digital i/o functions or for general purposes. the configurations presented are as implemented in the standard firmware. there are basically three port configurations: no digital i/o communication 4-pins digital i/o communication 6-pins digital i/o communication. these port configurations can be selected via the configuration map at start-up of the UDA1331H. the user can make a selection between two functions for each of the pins gp0 to gp4 (see byte 5 in table 6), except if digital i/o communication is selected (see tables 7, 8 and 9). 21 wterminaltype high byte 22 wterminaltype low byte 23 24 25 pointer language string 32 26 pointer manufacturer string 36 27 pointer product string 46 28 pointer serial number 54 32 t language string 36 t- manufacturer string 46 t- product string 54 t- serial number; note 2 byte (hex) register name comments bit value
1998 oct 06 22 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H table 7 no digital i/o communication notes 1. the input pins must have a pull-up resistor. 2. connect/disconnect: holds the usb disconnected as long as the initialization is not finished. 3. alarm mute: input to switch the sound off; specially used if the usb host program does not respond to the control. this pin acts directly on the sound and passes the mute to the usb host. 4. standby is switched on (output becomes low) after a programmable time if the mute is active (see byte 18 in table 6). 5. mute is switched on (output becomes low) after a programmable time if the isochronous data flow is interrupted (see byte 17 in table 6). 6. for selection between hid/led application see configuration map byte 11 (output is active high). table 8 4-pins digital i/o communication notes 1. connect/disconnect: holds the usb disconnected as long as the initialization is not finished. 2. alarm mute: input to switch the sound off; specially used if the usb host program does not respond to the control. this pin acts directly on the sound and passes the mute to the usb host. pin input/output function 1 function 2 gp5 output; not programmable; note 2 connect/disconnect connect/disconnect gp4 inputs; programmable; note 1 alarm mute; note 3 hid input 3 gp3 hid input 2 hid input 2 gp0 hid input 1 hid input 1 gp2 outputs; programmable standby; note 4 hid/led output 2; note 6 gp1 mute; note 5 hid/led output 1; note 6 pin input/output function 1 function 2 gp5 output; not programmable; note 1 connect/disconnect connect/disconnect gp4 digital i/o-bus bcko bcko gp3 wso wso gp2 do do gp1 di di gp0 input; programmable hid input 1 alarm mute; note 2
1998 oct 06 23 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H table 9 6-pins digital i/o communication filter characteristics the overall filter characteristic of the UDA1331H in flat mode is given in fig.6. the overall filter characteristic of the UDA1331H includes the filter characteristics of the dsp in flat mode plus the filter characteristic of the fsdac (f s = 44.1 khz). dsp extension port an external dsp can be used for adding extra sound processing features via the digital i/o-bus. the UDA1331H supports the standard i 2 s-bus data protocol and the lsb-justified serial data input format with word lengths of 16, 18 and 20 bits. using the 4-pins digital i/o-bus the UDA1331H device acts as a master, controlling the bck and ws signals. the period of the ws signal is determined by the number of samples in the 1 ms frame of the usb. this implies that the ws signal does not have a constant period time, but is jittery. using the 6-pins digital i/o-bus gp2, gp3 and gp4 are the output pins (master) and gp0, gp1 and gp5 are the input pins (slave). for characteristic timing of the i 2 s-bus input interface see figs 7 and 8. pin input/output function gp5 digital i/o-bus wsi gp4 bcko gp3 wso gp2 do gp1 di gp0 bcki
1998 oct 06 24 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H fig.6 overall filter characteristics of the UDA1331H. handbook, full pagewidth mgm110 volume (db) f (khz) 10 20 30 40 50 60 70 80 90 100 0 - 160 - 120 - 80 - 40 - 140 - 100 - 60 - 20 - 0 fig.7 timing of digital i/o input signals. handbook, full pagewidth mgk003 ws right lsb msb left bck data t f t r t h;ws t s;ws t bck(h) t bck(l) t cy t s;dat t h;dat
1998 oct 06 25 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here in this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force land scape pages to be ... handbook, full pagewidth lsb-justified format 16 bits lsb-justified format 18 bits lsb-justified format 20 bits left left left right right right 2 2 15 16 17 18 1 15 16 1 msb lsb b2 msb b2 b3 b4 b15 lsb b17 2 15 16 17 18 1 msb b2 b3 b4 lsb b17 2 15 16 17 18 19 20 1 msb b2 b3 b4 b5 b6 lsb b19 2 15 16 17 18 19 20 1 msb b2 b3 b4 b5 b6 lsb b19 2 15 16 1 msb lsb b2 b15 ws left right 3 2 1 3 2 1 msb b2 msb lsb lsb msb b2 > =8 > =8 bck data ws bck data ws bck data ws bck data input format i 2 s-bus mgk002 fig.8 input formats.
1998 oct 06 26 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H limiting values in accordance with the absolute maximum rating system (iec 134). notes 1. equivalent to discharging a 100 pf capacitor through a 1.5 k w series resistor. 2. equivalent to discharging a 200 pf capacitor through a 2.5 m h series inductor and a 25 w resistor. thermal characteristics recommended operating conditions symbol parameter conditions min. typ. max. unit all digital i/os v i/o dc input/output voltage range - 0.5 - v dd v i o output current -- 4ma temperature t j junction temperature 0 - 125 c t stg storage temperature - 55 - +150 c t amb operating ambient temperature 0 25 70 c electrostatic handling v es electrostatic handling note 1 - 3000 - +3000 v note 2 - 300 - +300 v symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 48 k/w symbol parameter min. typ. max. unit v dd supply voltage 3.0 3.3 3.6 v v i dc input voltage for d+ and d - 0.0 - v dd v v i/o dc input voltage for the digital i/os 0.0 - v dd v
1998 oct 06 27 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H dc characteristics v dd = 3.3 v; v ss =0v; t amb =25 c; f osc = 48 mhz; f s = 44.1 khz; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit supplies v dde digital supply voltage i/o pins 3.0 3.3 3.6 v v ddi digital supply voltage core 3.0 3.3 3.6 v v dda analog supply voltage 3.0 3.3 3.6 v v ddo operational ampli?er supply voltage 3.0 3.3 3.6 v v ddx crystal oscillator supply voltage 3.0 3.3 3.6 v i dde digital supply current i/o pins note 1 - 3 - ma i ddi digital supply current core - 36 - ma i dda analog supply current - 4.2 - ma i ddo operational ampli?er supply current - 4.0 - ma i ddx crystal oscillator supply current - 2.1 15.0 (2) ma p tot total power dissipation - 165 - mw p tot(ps) total power dissipation in power-save mode - 60 - mw inputs/outputs d+ and d - v i static dc input voltage - 0.5 - v ddi v v oh static dc output voltage high r l =15k w to ground 2.8 - v ddi v v ol static dc output voltage low r l = 1.5 k w to 3.6 v -- 0.3 v ? i lo ? high impedance state data line output leakage current -- 10 m a d v i(dif) differential input sensitivity 0.2 -- v v cm(dif) differential common mode voltage 0.8 - 2.5 v v se(rx)th single-ended receiver threshold voltage 0.8 - 2.0 v c i(trx) transceiver input capacitance pin to ground -- 20 pf digital inputs/outputs v il low-level input voltage -- 0.3v ddi v v ih high-level input voltage 0.7v ddi - v ddi v v ol low-level output voltage -- 0.4 v v oh high-level output voltage v ddi - 0.4 -- v ? i li ? input leakage current -- 1 m a c i input capacitance pin to ground -- 5pf
1998 oct 06 28 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H notes 1. this value depends strongly on the application. the specified value is the typical value obtained using the application as given in fig.10. 2. at start-up of the oscillator. filter stream dac v ref reference voltage - 0.5v dda - v v o(cm) common mode output voltage - 0.5v dda - v r o output resistance at pins voutl and voutr - 11 -w r o(l) output load resistance 2.0 -- k w c o(l) output load capacitance -- 50 pf symbol parameter conditions min. typ. max. unit
1998 oct 06 29 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H ac characteristics v dd = 3.3 v; v ss =0v; t amb =25 c; f osc = 48 mhz; f s = 44.1 khz; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit driver characteristics d+ and d - (full-speed mode) t r rise time c l =50pf 4 - 20 ns t f fall time c l =50pf 4 - 20 ns t rf(m) matching rise/fall time (t r /t f )90 - 110 % v cr output signal crossover voltage 1.3 - 2.0 v r (o)driver driver output resistance steady-state drive 28 - 43 w data source timings d+ and d - (full-speed mode) f i(sample) audio sample input frequency 5 - 55 khz f fs(d) full-speed data rate 11.97 12.00 12.03 mbits/s t fr frame interval 0.9995 1.0000 1.0005 ms t j1(dif) source differential jitter to next transition - 3.5 0.0 +3.5 ns t j2(dif) source differential jitter for paired transitions - 4.0 0.0 +4.0 ns t w(eop) source end of packet (eop) width 160 - 175 ns t eop(dif) differential to eop transition skew - 2.0 - +5.0 ns t jr1 receiver data jitter tolerance to next transition - 18.5 0.0 +18.5 ns t jr2 receiver data jitter tolerance for paired transitions - 9.0 0.0 +9.0 ns t eopr1 eop width at receiver must reject as eop 40 -- ns t eopr2 eop width at receiver must accept as eop 82 -- ns serial input/output data timing; see fig.7 f clk(sys) system clock frequency - 12 - mhz f i(ws) word select input frequency 5 - 55 khz t r rise time -- 20 ns t f fall time -- 20 ns t bck(h) bit clock high time 55 -- ns t bck(l) bit clock low time 55 -- ns t s;dat data set-up time 10 -- ns t h;dat data hold time 20 -- ns t s;ws word select set-up time 20 -- ns t h;ws word select hold time 10 -- ns
1998 oct 06 30 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H sda and scl lines (standard i 2 c-bus); see fig.5 f scl scl clock frequency 0 - 100 khz t buf bus free time between a stop and start condition 4.7 -- m s t hd;sta hold time (repeated) start condition 4.0 -- m s t low scl low time 4.7 -- m s t high scl high time 4.0 -- m s t su;sta set-up time for a repeated start condition 4.7 -- m s t su;sto set-up time for a stop condition 4.0 -- m s t hd;dat data hold time 5.0 - 0.9 m s t su;dat data set-up time 250 -- ns t r rise time of both sda and scl signals -- 1000 ns t f fall time of both sda and scl signals -- 300 ns c l(bus) load capacitance for each bus line -- 400 pf oscillator; note 1 f osc oscillator frequency - 48 - mhz d duty factor - 50 - % g m transconductance 13.5 23.0 30.5 ms r o output resistance 450 700 1450 w c i(xtal1) parasitic input capacitance at xtal1 10 11 12 pf c i(xtal2) parasitic input capacitance at xtal2 4.5 5.0 5.5 pf i start start current 4.3 8.8 15.0 ma power-on reset t su(por) power-on reset set-up time notes 2 and 3 5c ref -- ms filter stream dac (fsdac) res resolution 16 -- bits v o(fs)(rms) full-scale output voltage (rms value) v dd = 3.3 v - 0.66 - v svrr supply voltage ripple rejection of v dda and v ddo f ripple = 1 khz; v ripple(p-p) = 0.1 v - 60 - db ?d v o ? channel unbalance maximum volume - 0.03 - db a ct crosstalk between channels r l =5k w- 95 - db symbol parameter conditions min. typ. max. unit
1998 oct 06 31 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H notes 1. a 3rd overtone crystal of 48 mhz must be used in combination with a filter connected to the oscillator output (xtal2), (l = 1.5 m h 10%; c = 10 nf 10%). the series resistance of the crystal must be below 60 w . c xtal1 = 4.7 pf 10%; c xtal2 =12pf 10%). 2. strongly depends on the external decoupling capacitor connected to v ref . 3. use for calculation of the power-on reset set-up time the c ref value in m f. 4. the audio information from the usb interface is fed directly to the adac. application information the UDA1331H can only be used in combination with an external (e)prom. this (e)prom can be connected to the port pins (p0 and p2) of the UDA1331H and must contain the firmware for the microcontroller. the UDA1331H will be delivered with standard usb compliant firmware. the i 2 c-bus eeprom is optional and can be used to configure client specific configurations and descriptors. more information about the firmware, descriptors and configurations can be obtained from several application notes. (thd + n)/s total harmonic distortion-plus-noise to signal ratio f s = 44.1 khz; r l =5k w at input signal of 1 khz (0 db) -- 90 (4) - 80 db - 0.0032 0.01 % at input signal of 1 khz ( - 60 db) -- 30 (4) - 20 db - 3.2 10 % s/n bz signal-to-noise ratio at bipolar zero a-weighted at code 0000h 90 95 - dba symbol parameter conditions min. typ. max. unit
1998 oct 06 32 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H application diagram handbook, full pagewidth 64 gp0/bcki 2 gp5/wsi 7 gp1/di 17 d - 20 d + 32 v dde 30 v sse 25 v ddi 29 45 44 v ssi UDA1331H + v d 100 nf (63 v) 100 nf (63 v) c17 c18 1 w r17 l12 blm32a07 + v c + v d + v c + v a 100 nf (63 v) 100 nf (63 v) c15 c16 1 w r16 l11 blm32a07 blm32a07 4.7 pf (50 v) c13 12 pf (63 v) c6 + v a 100 nf (63 v) 47 m f (16 v) c8 c14 r15 1 w + v c 37 xtal1 38 xtal2 r9 1.5 k w r14 22 w r13 22 w p5 digital input bcki wsi di c4 22 pf (63 v) c5 22 pf (63 v) c26 10 nf (50 v) 1 l9 8 2 7 3 6 45 v dda v ssa 10 nf (63 v) c7 l10 1.5 m h c1 100 m f (16 v) c2 100 m f (16 v) c3 100 m f (16 v) 10 nf (50 v) c27 x1 48 mhz l15 blm32a07 l14 blm32a07 l16 v d(ext) (1) v a(ext) (1) gnd mbk531 4 3 2 1 fig.9 application diagram (continued in fig.10). (1) blm32a07. (2) v d(ext) can be connected to 5 v (max) (5 v tolerant i/o).
1998 oct 06 33 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H fig.10 application diagram (continued from fig.9). (1) blm32a07. handbook, full pagewidth mbk532 56 p0.0 57 p0.1 58 p0.2 59 p0.3 60 p0.4 62 p0.5 63 p0.6 5 p0.7 9 ale 11 p2.0 12 p2.1 18 p2.2 19 p2.3 21 p2.4 22 p2.5 4 sda 3 scl 8 psen 18 17 14 1 a0 2 a1 3 a2 4 v ss 8 v dd 7 ptc 6 scl 5 sda 13 8 7 4 3 d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 11 le 14 gp4/bcko 13 gp3/wso 10 39 gp2/do 61 rtcb 55 tc 15 shtcb v ddx 36 v ssx 51 v ddo 49 v sso 1 19 16 15 12 9 6 5 2 20 10 oe q 0 q 1 q 2 q 3 q 4 q 5 q 6 q 7 v cc gnd 74hct373d d3 d2 d4 UDA1331H pcx8582x-2 10 a0 9 a1 8 a2 7 a3 6 a4 4 a6 5 a5 3 a7 24 a9 25 a8 21 a10 2 11 12 13 15 16 17 18 19 28 14 a12 23 a11 o0 o1 o2 o3 o4 o5 o6 o7 v cc eepm27128 26 a13 22 oe 6 ea 20 ce 27 pgm gnd 1 v pp + v d + v d c25 100 nf (50 v) + v d c24 100 nf (50 v) + v c 100 nf (63 v) 100 nf (63 v) c28 c21 1 w r19 l13 blm32a07 + v a 100 nf (63 v) 47 m f (16 v) c9 c19 1 w r18 42 v ref 53 voutl r6 10 k w r7 10 k w + vd bcko wso do p8 sda (i 2 c-bus) (external rom) scl 1 2 c10 r8 4.7 k w r20 1 w audio output 47 m f (16 v) c11 47 m f (16 v) 46 voutr c12 47 m f (16 v) c22 100 nf (63 v) c23 100 nf (63 v) + v d digital output
1998 oct 06 34 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H package outline unit a 1 a 2 a 3 b p ce (1) eh e ll p z y w v q references outline version european projection issue date iec jedec eiaj mm 0.25 0.05 2.90 2.65 0.25 0.50 0.35 0.25 0.14 14.1 13.9 1 18.2 17.6 1.2 0.8 7 0 o o 0.2 0.1 0.2 1.95 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 1.0 0.6 sot319-2 95-02-04 97-08-01 d (1) (1) (1) 20.1 19.9 h d 24.2 23.6 e z 1.2 0.8 d e q e a 1 a l p detail x l (a ) 3 b 19 y c e h a 2 d z d a z e e v m a 1 64 52 51 33 32 20 x pin 1 index b p d h b p v m b w m w m 0 5 10 mm scale qfp64: plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm sot319-2 a max. 3.20
1998 oct 06 35 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). re?ow soldering reflow soldering techniques are suitable for all qfp packages. the choice of heating method may be influenced by larger plastic qfp packages (44 leads, or more). if infrared or vapour phase heating is used and the large packages are not absolutely dry (less than 0.1% moisture content by weight), vaporization of the small amount of moisture in them can cause cracking of the plastic body. for more information, refer to the drypack chapter in our quality reference handbook (order code 9397 750 00192). reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. wave soldering wave soldering is not recommended for qfp packages. this is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. caution wave soldering is not applicable for all qfp packages with a pitch (e) equal or less than 0.5 mm. if wave soldering cannot be avoided, for qfp packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used the footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. repairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1998 oct 06 36 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. purchase of philips i 2 c components data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation. purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
1998 oct 06 37 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H notes
1998 oct 06 38 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H notes
1998 oct 06 39 philips semiconductors preliminary speci?cation universal serial bus (usb) audio playback peripheral (app) UDA1331H notes
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1998 sca60 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reli able and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2865, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 625 344, fax.+381 11 635 777 for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 160 1010, fax. +43 160 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 200 733, fax. +375 172 200 773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 689 211, fax. +359 2 689 102 canada: philips semiconductors/components, tel. +1 800 234 7381 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. +45 32 88 2636, fax. +45 31 57 0044 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615800, fax. +358 9 61580920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 40 99 6161, fax. +33 1 40 99 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 23 53 60, fax. +49 40 23 536 300 greece: no. 15, 25th march street, gr 17778 tavros/athens, tel. +30 1 4894 339/239, fax. +30 1 4814 240 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 printed in the netherlands 545102/750/03/pp40 date of release: 1998 oct 06 document order number: 9397 750 04263

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